Functional coverage vs. Code Coverage
Design Verification Engineer Interview Questions
1,115 design verification engineer interview questions shared by candidates
What is an Agent? Passive vs. Active.
what is Synchronous reset and asynchronous reset?
You are given a string that contains numbers, the arithmetic operators +, -, *, /, and various types of parentheses. Design and write pseudocode for a function that evaluates the expression and returns its numerical result.
All basic pipelining, hazards and their types, prevention techninques.
Abstarct class vs Interface, inheritance,polymorphism…..etc Observer and Factory DP in details. Log file output analysis. Behavioural questions. Giving basic and simple designs with some specifications and elaborate a strategy to verify it.
what is function overriding and overloading
Implement a random number generator in c++ and reduce the complexity, asked me to write the code
Verify a packet processing DUT where packets coming in have a certain priority.
What is the difference between blocking and non-blocking assignments?
Viewing 711 - 720 interview questions