Given a sequential Circuit with delays and asked about the frequency and slack of the circuit..?
Physical Design Engineer Interview Questions
711 physical design engineer interview questions shared by candidates
How to resolve Placement congestion.
What did you do on your project
Vlsi, setup and hold time violation, pipeline, logic design
What is the critical path? How does one go about determining it?
What is setup and hold time
when Capacitors in series or parallel what happens to charge and voltage
XOR with 2:1 MUX Edge detection Circuit Setup and hold time their violations Why do we need them what can you do to reduce them what would you do to correct s&h time after fabrication
They asked about the projects on the resume and basic questions about timing
most complicated block i have ever done in apple
Viewing 151 - 160 interview questions