Setup and hold time basic embedded systems - ALU, Memory, control logic moore mealey machine, state transition diagram
Physical Design Interview Questions
712 physical design interview questions shared by candidates
Questions were allright - basic ASIC, STA questions.
how to solve setup violation? What the solution would impact on the other part of the design? how to deal with the SI issue? Clearly know about the calculation of setup time, or min clock period What is OCV on timing check？how to calculate? What is the CPPR?
implement A XOR B by NAND only
Write the Verilog code for a up counter
1. Toughest question asked (in my opinion, as it required creativity and knowledge to answer) was on writing the following function in Verilog: W = .5X + .25Y Where W was an output, and X/Y are inputs. 2. If X/Y where 4 bits each, what is maximum output number possible?
Implement integer division
DCG related, how to fix timing? Verilog RTL case x, case z, DFF, Dlatch Perl scripting TCL scripting in PT ICC Design patitioning
Q : explain all basic concepts of STA
Psychological and Analytic questions would take a conscious presence of mind to go through, The question includes technical knowledge with twists
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