STA, PNR, and the Antenna effect. Basic logical gate circuit.
Physical Design Interview Questions
712 physical design interview questions shared by candidates
What is setup and hold time? How to fix any timing violation? Explain the sanity checks for each stage of the PD flow? What is crosstalk, EM, antenna violation?
Tell any 5 commands and how to validate floorplan
What are some examples of scripts you have wrote, and give some scripting solutions to a problem, e.g. parsing timing reports.
Questions on our approach in solving the written test was asked.
How much experience in working on Block Level P&R. Describe Why Routing Required?
Mainly focus on deep concept of physical design like IR drop , Floating nets, Setup hold , pulse width violation ..
> Basics of PnR flow issues w.r.to congestion, cts, placement. > Any issues which faced in your previous project , how did you fix that ? > You should know about everything you write in the resume.
Basic of digital ,CMOS ,PD flow, CMOS power ,STA
You need to have a standard cell library to design your adder. What kind of cells you need and how many levels in each cell?
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