Throughout the asic design flow., Emphasizing more on debugging and validation of results
Physical Design Interview Questions
711 physical design interview questions shared by candidates
Asic design flow, asked to explain each step briefly, drilled on the topic clock gating, power gating, glitch circuit
Explain the challenges involved in previous tapeout
Transistor level details from college level courses.
tell me about your block
Timing analysis, digital logic design, transistor sizing and parasitics.
Setup hold time dependency factors in a flip flop
Setup and hold constraints for negative and positive clock skew
explain synthesis process, and problem.
Draw CMOS circuit of some gates. Write script to identify missing random number.
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