Describe your CV and previous experience. Talk about my bachelor thesis.
Senior Verification Engineer Interview Questions
3,655 senior verification engineer interview questions shared by candidates
What is regression testing?
1. UVM Methodology
Tell me why i should hire you. Share with me some of the projects you did in school
Verify a protocol and tell checkers
What projects did you do in this domain? Explain.
Various questions related to integrated analog/mixed signal IP. CSAs, BGRs and general guidelines of DSP were discussed.
Basic digital design questions, constraints, assertion.
How the UVM sequencer and the sequence handshake happens
Some of the questions were: - Tell us about yourself - What do you think your role would be? - If someone in your team doesn't meet the deadlines what will be your response? - Did you have some questions for us? - How would you prioritize some tasks? - Based on Veriff’s mission, what resonates with you? - How can I identify fraud through a photo? - Do you have some questions for us?
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