One of the main things they asked me was about how I would handle multiple incidents happening at the same time. They wanted to know my approach to prioritization and communication, and I explained how I use triage frameworks and clear escalation paths to make sure critical threats are addressed first while still keeping stakeholders updated
Asked about full technical and languages
Asked abt some ee theory, what is logic gate etc
A specific question about the previous project
A specific question about the previous project
Designing Various Circuits (Low Pass filter)
What assertions did I write to verify functionality of my SV projects? Sequence detector 10110? What is FSM-D?
Draw the D flip flop gate level design and explain
UVM, components, monitor, driver, constraints
evaluation regions semaphore virtual interfaces modport uvm
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