It consisted of 2 rounds. In Round 1 they asked about basics of digital electronics, cro, osciloscope. In Round 2, they asked to code traffic light controller o verilog and discuss its area, power
Verification Engineer Interview Questions
3,657 verification engineer interview questions shared by candidates
Questions based on digital are from FSM and flip flops, From verilog there are questions based on always initial block, blocking and non blocking assignments, and data types From Systemverilog there are questions from data types, array, OOPS concept
priority encoder MUX conversions array manipulation
Basic behavioural and problem solving, mixed concepts such as OOP, AI, UVM.
cpu hazard? pipeline? stages of pipeline? how to test 32 bit adder?
Explain the computer architecture project on the resume; Explain RAW hazard with example in assembly language; Cache- Explain 3 way set associate mapping
Verilog- blocking and non blocking; purpose of initial
design FSM given a sequence
Type of cache memory and hazards
Calculate voltage at different nodes of am op amp?
Viewing 1741 - 1750 interview questions