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Verification Interview Questions
3,656 verification interview questions shared by candidates
Basics of computer architecture, verification, data structures, rtl logic Telephonic interview was basics of RTL design
Virtual mem questions....
how do you know you have cover all the case in your testbench
question on packet transfer inside of test bench from generator to driver... (system verilog concepts)
Given an async fifo, tell the testplan --> complicated fifo with lot of requirements..(writes are done by 3 masters. there is an arbiter).
1. How to verify a memory 2. MOESI cache protocol
what is blocking and non blocking?
On projects and sv uvm based Protocol knowledge on what we mentioned in resume
mostly in uvm and sv
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