Setup time vs hold time/how to fix?
Physical Design Engineer Interview Questions
711 physical design engineer interview questions shared by candidates
How to combine nmos and pmos with only one substrate?
Describe the transistor IV cruve
Make a CMOS inverter with MOSFETs
What is setup and hold time? How to fix any timing violation? Explain the sanity checks for each stage of the PD flow? What is crosstalk, EM, antenna violation?
Tell any 5 commands and how to validate floorplan
basic cmos circuits and power consumptions
Describe how to build a flip-flop
scripting, low power in vlsi, general digital vlsi question, depth questions in PnR flow
Basic pd questions, logical thinking
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