projects, setup / hold violation and mitigation, low power design, device physics
Physical Design Engineer Interview Questions
711 physical design engineer interview questions shared by candidates
How to combine nmos and pmos with only one substrate?
Describe the transistor IV cruve
Make a CMOS inverter with MOSFETs
STA, PNR, and the Antenna effect. Basic logical gate circuit.
explain the types of files that are fed as input to floorplan step
What are the differences between buffers and inverters? A ~30 minute discussion on this question followed.
implement XOR using NANDs Setup and Hold Timing constraints
fundamental questions and design questions.
Explain the gate level design of a flipflop. Explain why are we using master-slave configuration?
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