Once you clear the written test which you might get to know within a week after the test, then there would be a skype interview. Interview focus is mainly on your projects or internships. low power techniques, STA, How to fix setup and hold violation in a design and cmos related questions.
Can you explain common centroid layout?
1. What is setup and hold time? 2.Operation regions 3. Vlsi design flow 4.Questions related to MOS Circuit
Complete PNR flow and each stage questions STA basics to advance concepts Scenario based questions
given waveforms of D, clk, Q and out of multiplyng by 2 and shifting. I need to draw the FF system.
Tell me about yourself , projects worked on , PD Flow
Digital electronics, network theory, EDC, Aptitude
Clock gating vs Power gating
What is DRC?
About the project details and the basics
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