STA Static power/Dynamic power signal integrity ( cross talk ) some questions related to my resume
Senior Physical Design Engineer Interview Questions
712 senior physical design engineer interview questions shared by candidates
Why you do clk gating in your design
How to determine which register you want to gate in netlist ?
they asked about projects I did.
Static Timing Analysis, Setup time, Hold time, Clock gating, Clock Path Pessimism Removal, Digital design flow, Vmin
How often do you use the digital programming software?
Numerical questions based on setup and hold time were asked? Which bulb will glow brighter- series or parallel? Draw the circuit for dividing 8-bit numbers by 5. What are rectifiers? How do Bridge wave rectifiers differ from Full-wave rectifiers? Explain using a diagram. Write C code for identifying repeated numbers in a given sequence using minimum complexity. Draw XOR gate using NAND gate. Draw FSM for divisible by 2 and divisible by 3 numbers.
Design an XOR gate in CMOS
Microelectronics
List 3 things that you are interested in this role the most.
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