Analyze the setup and hold timing violations
Senior Physical Design Engineer Interview Questions
712 senior physical design engineer interview questions shared by candidates
Explain the Electromagnetic Fields theory
They asked me Short Channel Effects.
In the first interview, I was asked a lot about what jitter is and how to deal with it. In addition, we talked about clock gating.
Explain what ssgnp means in the name of the corner
explain the terms: setup and hold times, cmos inverter. use graphs and equations to explain.
Using dynamic logic to build a XOR function.
mentioned above
All the concepts of STA
What is pd flow and explain them with their input and outputs
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