AOCV and POCV in detail
Senior Physical Design Engineer Interview Questions
712 senior physical design engineer interview questions shared by candidates
What is floorplanning, partitioning, etc.
projects, setup / hold violation and mitigation, low power design, device physics
OCV related, Cross-talk related, timing analysis
What if the gap between the macros increases in the floor placement..?
CMOS question and physical design course
Tell any 5 commands and how to validate floorplan
basic cmos circuits and power consumptions
nothing unexpected
Self intro Input file Floorplan Guidelines to macro Physical cells Taps cells Latchup effect Placement Output reports of placement What is setup and hold How to overcome setup violations
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